Intern/Co-op - Design Verification Engineer

 

Company:

Location: Austin, TX

Date Posted: Mon, 12 Apr 2021 22:00:28 GMT

Salary:

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Job Description:

Engineering with a GPA of 3.6 or above Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM...

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